硬件对应链接关系看一楼。 需要注意的是,除了CLK,其他线均需添加10K上拉电阻(SDIO通讯标准要求)。 软件找到这个文件: /build_dir/target-mipsel_24kec+dsp_uClibc-0.9.33.2/linux-ramips-mt7688/linux-3.18.29/drivers/mmc/host/mtk-mmc/sd.c 按照如下patch修改: --- a/drivers/mmc/host/mtk-mmc/sd.c +++ b/drivers/mmc/host/mtk-mmc/sd.c @@ -2739,7 +2739,7 @@ struct msdc_host *host; struct msdc_hw *hw; int ret, irq; - u32 reg; + u32 reg, reg1; printk("MTK MSDC device init.\n"); mtk_sd_device.dev.platform_data = &msdc0_hw; @@ -2754,8 +2754,11 @@ //#elif defined (CONFIG_RALINK_MT7628) /* TODO: maybe omitted when RAether already toggle AGPIO_CFG */ reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x3c)); - reg |= 0x1e << 16; + reg &= ~(0x1e << 16); sdr_write32((volatile u32*)(RALINK_SYSCTL_BASE + 0x3c), reg); + reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3<<0) & ~(0x3<<6) & ~(0x3<<10) & ~(0x1<<15) & ~(0x3<<20) & ~(0x3<<24) | (0x1<<0) | (0x1<<6) | (0x1<<10) | (0x1<<15) | (0x1<<20) | (0x1<<24); + reg1 = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x1340)) | (0x1<<11); //Normal mode(AP mode) , SDXC CLK=PAD_GPIO0=GPIO11, driving = 8mA + sdr_write32((volatile u32*)(RALINK_SYSCTL_BASE + 0x1340), reg1); - reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3<<10); #if defined (CONFIG_MTK_MMC_EMMC_8BIT)